Impact Of MSC + CSI

• Minimal per-nanocontroller hardware

• Real-time constraints can be maintained by timing analysis in MSC + CSI or by polling a (relatively slow) global clock signal

• Coordination as a parallel computer can use a SIMD-like inter-nanoprocessor network, without hardware routing or arbitration logic

• MIMD programs work as expected

• Reprogramming might have a long compile time, but is easily accomplished